1. Field of the Invention
The present invention relates to an apparatus and a process for making a semiconductor device, especially, of the chip-size-package type.
2. Description of the Related Art
Semiconductor devices of the chip-size-package (CSP) type, in which the size of a chip is substantially equal to the size of a package, are will known. FIGS. 10-13 show an example of the wafer-level CSP. Its manufacturing process will be described.
In FIG. 10, a plurality of connection pads or aluminum electrodes 2 are formed on the circuit surface of a semiconductor or silicon wafer substrate 1, and a surface protection film 3 is formed thereon such that the central areas of the connection pads 2 are exposed. The surface protection film 3 is made by, for example, coating and hardening a polyimide resin over the circuit surface of the semiconductor wafer substrate 1, applying resist patterning and protection film patterning, and removing the resist.
A plurality of rewiring lines 5 are formed on the connection pads 2 through openings 4 of the surface protection film 3. The rewiring lines 5 are made by applying UBM spattering, rewiring resist coating and hardening, and rewiring resist patterning, and electrolytic plating to the areas opened by the resist.
A plurality of posts or cylindrical electrodes 6 are provided at predetermined positions on the rewiring lines 5. The posts 6 are made by, for example, coating and hardening a post forming resist at a thickness of 100 to 150 um for resist patterning and applying electrolytic plating to the opened areas. Then, the post forming resist is removed while the UBM deposited on the undesired area is removed by etching.
In FIG. 11, a resin, such as epoxy, is molded over the circuit surface of the semiconductor wafer substrate 1 to form an enclosing resin layer 7. After the enclosing resin is hardened, the semiconductor wafer substrate 1 is placed on a grinding table for polishing the upper surface of the enclosing resin layer 7 to expose the end faces 6a of the posts 6 (see FIG. 12). Then, the oxide film is removed from the surface, and the surface is metallized by solder printing.
Then, the back side of the semiconductor wafer substrate 1 is ground to a predetermined thickness, and the model and lot Nos. are marked on the back side. The semiconductor wafer substrate 1 is placed on a dicing tape provided on a dicing frame. As shown in FIG. 13, the semiconductor wafer substrate 1 is diced along a cutting line 8 to provide individual chips or semiconductor devices 10.
The enclosing resin layer 7 of the wafer-level CSP semiconductor devices 10 is made by, for example, transfer-molding using such a metal mold 100 as shown in FIG. 14. This resin enclosing apparatus comprises a first metal mold 100a on which the semiconductor wafer substrate 1 is placed and a second metal mold 100b having a cavity opposed to the circuit surface of the semiconductor wafer substrate 1. A cylinder hole 101a is provided in the second metal mold 100b to receive a plunger 101.
The enclosing resin layer 7 is made by placing the semiconductor wafer substrate 1 on the first metal mold 100a, closing the second metal mold 100b, filling the cylindrical hole 101a with a predetermined amount of resin, melting the resin, and pushing the plunger 101 under a predetermined pressure to fill the cavity with the molten resin. The plunger 101 is kept under the pressure until the resin is hardened in the cavity and released to provide the enclosing resin layer.
It is necessary to fill the cavity of the second metal mold 100b with the resin evenly. Since the thickness of the semiconductor wafer substrate 1 and the weight of resin tablets vary, it is necessary to use a volume of resin tablets that is larger than the cavity volume. Depending on variations in the tablet weight and the thickness of the semiconductor wafer substrate 1, an excessive resin remaining in the cylindrical hole 101a can form a projection of 3 to 6 mm on the enclosing resin layer 7 that has a thickness of 190 to 220 um.
Such a projection can break the semiconductor wafer substrate 1 or separate the enclosing resin layer 7 from the wafer surface when the metal mold 100 is released. In addition, in the subsequent resin layer grinding step, an additional step for removing the projection by grinding is required, resulting in the reduced through-put of the manufacturing process. Moreover, the local stress produced by grinding the projection can break the semiconductor wafer substrate 1.